1. Field of the Invention
The present invention relates to an apparatus and method for recovering a carrier frequency of a receiving signal in a wireless packet communication system using differential decoding; and, more particularly, to a carrier frequency recovering apparatus and method that can perform demodulation without deterioration, no matter how large a frequency offset is, and minimize structural complexity, although a frequency offset tolerance range is higher than a symbol rate, just as a Direct Sequence Spread Spectrum (DSSS) Differential Binary Phase Shift Keying (DBPSK) system in a low-rate personal wireless communication network following IEEE 802.15.4 Specification.
2. Description of Related Art
Using a crystal oscillator with a high-precision property is very effective in the respect of reducing frequency offsets caused by errors of the oscillator between a transmitter and a receiver of a wireless communication system. The cost for a crystal oscillator generally accounts for less than 1% of the entire material costs of a common communication device or a household electronic product, such as a mobile phone and a television (TV) set.
However, the cost for a crystal oscillator reaches up to 10% of the entire material costs for each unit product in a system having low-cost and low-data transmission rate as its mottos, such as a Low-Rate Wireless Personal Area Network (LR-WPAN) defined in an IEEE 802.15.4 Specification. Traditionally, TVs and FM radios employ an RF receiver without a crystal oscillator. Since a communication system without a crystal oscillator has a relatively wide transmission bandwidth, compared to the transmission frequency, or it requires manual frequency tuning from a user, it is not appropriate as a modern communication system.
These days, the LR-WPAN system for a low-cost sensor node apparatus that has a receiver without a crystal oscillator comes into the limelight. The LR-WPAN based on the IEEE 802.15.4 defines a carrier frequency offset tolerance value of ±40 ppm, which is a rather large value, to minimize complexity in realization.
In a general Direct Sequence Spread Spectrum (DSSS) system, there is a pilot channel and frequency is recovered by estimating frequency and phase offsets based on pilot signals received through the pilot channel and using a Phase Lock Loop (PLL). The structure has an advantage that frequency and phase offsets are accurately estimated. Thus, it is proper to coherent demodulation.
However, a packet communication system, such as the LR-WPAN system, can hardly support an additional pilot channel. Thus, if there is a preamble, the system should seek to estimate and compensate for a frequency offset by using the preamble. Herein, when differential decoding is used instead of coherent demodulation, the receiver can be simplified and the effect of frequency offset can be reduced.
Differential phase Shift Keying (PSK) is a technology for recovering signals by using a delay value of a previous symbol and phase information of a current symbol. Generally, the receiver using differential decoding has a property that it is robust to phase shift of a small range, which is caused among adjacent symbols, and it can also reduce the effect of phase noise.
The frequency offset tolerance value can be obtained more in differential chip detection (DCD) where signals are detected at a chip level than in differential symbol detection (DSD) where signals are detected at a symbol level.
A LR-WPAN Standard technology following the IEEE 802.15.4 Specification supports a low-rate data service as fast as 20 Kbps/40 Kbps by using a DSSS Differential Binary Phase Shift Keying (DBPSK), which is a symbol level modulation method, in a band of 868 MHz to 915 MHz. The frequency offset tolerance value is ±40 ppm for each of a transmitter and a receiver, and it is ±80 ppm (160 ppm) for the entire system.
The frequency offset tolerance value signifies that frequency offsets are tolerable in a range of 69 KHz to 73 KHz in the band of 868 MHz to 915 MHz. The tolerance value is about two to three times as high as the symbol transmission rate. Thus, it is difficult to synchronize signal reception by using a general frequency recovering method. Although a conventional differential demodulation may be adopted, it deteriorates performance and makes the structure of a receiver complicated. In addition, it increases the costs.
According to the conventional coherent frequency offset estimation apparatus estimates frequency offsets by using the currently received signals, provides the frequency offset estimation information to an oscillator, and multiplies inputted signals by the frequency offset estimation information to thereby compensate for the frequency offset in a low pass filter. An example of the conventional coherent frequency offset estimation apparatus will be described hereafter with reference to FIG. 1.
FIG. 1 is a schematic diagram illustrating a conventional frequency recovering apparatus using a Costas loop. It describes how a carrier is recovered through the Costas loop in a synchronous communication system.
Referring to FIG. 1, receiving signals are multiplied by an orthogonal carrier of a frequency offset component estimated in a numerically controlled oscillator (NCO) 103 at multipliers 100, 101, 102 and 104. Subsequently, offset signals are acquired through an adder 105 and a subtracter 106. The offset signals are multiplied by the outputs of two low pass filters (LPF) 107 and 108 and then filtered in a loop filter 109 to thereby produce an estimated frequency offset. The estimated frequency offset is fed back to the numerically controlled oscillator 103 and drives the numerically controlled oscillator 103.
However, the range of the maximum frequency offset that can be estimated depends on the symbol transmission rate. When the DCD method is used, the range can be extended as much as the chip rate. However, since the DSSS DBPSK method of the LR-WPAN following the IEEE 802.15.4 Specification uses the DSD method, the frequency offset compensation performance is deteriorated remarkably.